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教授
斉 培恒
Baiko Sai
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出身国
中国/China （1995年 帰化）
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学位 分野・取得大学
博士（北海道大学）/Ph.D (Hokkaido University)
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教授分野
情報通信/Information Communication Technology
MIUで学びたいあなたへ
Information science is a tool that has brought a great revolutionary evolution of human society.
It is also a "weapon" in international competition environment.
Let's learn information science knowledge at MIU and become an international person with excellent talent and sense in your fun future!
情報科学は人類社会に大きな革命的進化をもたらしたツールです。
国際的な競争環境においても「武器」となる。
MIUで情報科学の知識を学び、楽しい未来に向けて優れた才能とセンスを持った国際人になりましょう！
主な研究課題 Research Topics
Wireless Comunication, Information Technology, System LSI Design, Information Theory
無線通信、情報処理、システムLSI設計、情報理論
主な研究業績 Research Achievements
Publications：
・“Digital Scramble Technology”, PIONEER R&D, 1996.
・“Conditional access system in satellite digital broadcasting”, PIONEER R&D, 1996.
Journal Articles:
・”Study of piecewise linear Median Hybrid filter using nonlinear sub-filters”, Baiko Sai, Ryuji Kono, Hideki Imai, Institute of Electronics, Information and Communication Engineers, Circuits and Systems Study Group CAS90-138, pp.23-30, 1991
・”Median Differential Order Statistic Filters”,Peiheng Qi (English name before naturalization, Japanese name Baiko Sai), Ryuji Kohno and Hideki Imai,IEICE Trans Fundamentals, E75-A, 9, pp.1100-1109、1992.
・”Performance Evaluation and ASIC Design of LDPC Decoder for IEEE802.11n”,Wahyul Amien Syafei, Yuhei NAGAO, Masayuki KUROSAKI, Baiko SAI, and Hiroshi OCHI,Consumer Communications and Networking Conference, 2009. CCNC 2009. 6th IEEE, Page 1-5,2009.
・”PAPR Reduction Technique for Next Generation Gigabit WLAN”、Wahyul Amien Syafei, Yuhei Nagao, Masayuki Kurosaki, Baiko Sai, Hiroshi Ochi、Journal of Signal Processing, Vol.14, No.5, pp.384-386、2010.
・”VLSI Architecture of MMSE-MIMO Detector and 4 x 4 MIMO-OFDM Transceiver with 80-MHz Channel Bandwidth”,Baiko Sai, Shingo Yoshizawa and Yoshikazu Miyanaga,Journal of Signal Processing, 15, 1, pp. 55-64,2011.
・”A Proposition of 600Mbps WLAN-Like System with Low-Complexity MIMO Decoder for FPGA Implementation”,Wahyul Amien Syafei, Yuhei Nagao, Ryuta Imashioya, Masayuki Kurosaki, Baiko Sai, and Hiroshi Ochi,IEICE Transactions on Communications, Vol.E94-B, No.2, pp.491-498,2011.
・”A Proposition of 600Mbps WLAN-Like System with Low-Complexity MIMO Decoder for FPGA Implementation”,Wahyul Amien Syafei, Yuhei Nagao, Ryuta Imashioya, Masayuki Kurosaki, Baiko Sai, and Hiroshi Ochi,IEICE Transactions on Communications, Vol.E94-B, No.2, pp.491-498,2011.
・”A CUDA Implementation of DWT for JPEG 2000 Codec”,Masayuki KUROSAKI, Masateru MATSUO, Yoshimatsu KUROKI, Yuhei NAGAO, Baiko Sai, and Hiroshi OCHI,IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Vol.E94-A No.11 pp.2358-2360,2011.
・”A compression-based area-efficient recovery architecture for nonvolatile processors”,Yongpan Liu ; Yumeng Liu ; Daming Zhang ; Shuangchen Li ; Baiko Sai; Mei-Fang Chiang ; Huazhong Yang,DATE ’12: Proceedings of the Conference on Design Automation and Test in Europe, March 2012, pp. 1519-1524,2012.
・”ASIC Design of 600Mbps 4×4 MIMO Wireless LAN System”,Thi Hong Tran, Yuhei Nagao, Masayuki Kurosaki, Baiko Sai, Hiroshi Ochi,The 14th International Conference on Advanced Communication Technology, ICACT 2012, pp. 360-363,2012.
・”RTL Design of Joint CFO and IQ-Imbalance Compensator for Narrow-Band Wireless System”,Takuro Yoshida, Daisuke Nojima, Leonardo Lanante Jr. Yuhei Nagao, Masayuki Kurosaki, Baiko Sai, and Hiroshi Ochi,ECTI Transaction on Computer and Information Technology (ECTI Transaction CIT), vol.6, no.1, pp.54-61,2012.
・”Channel Estimation for MISO DVB-T2 System in High-Speed Environment”,Nico Surantha, Tatsumi Uwai, Yuhei Nagao, Masayuki Kurosaki, Baiko Sai, Hiroshi Ochi,RISP Journal of Signal Processing, Vol. 17, No.5, pp. 179-188,2013.
・”A Parallel Compare and Compress Codec for Area Reduction in Nonvolatile Processors”,Yiqun Wang, Yongpan Liu, Shuangchen Li, Daming Zhang, Mei-Fang Chiang, Baiko Sai, Hu,X.S., Huazhong Yang,Very Large Scale Integration(VLSI) System, IEEE Transactions on Volume:22, Issue:7, Page 1491-1505,2014.
・”Dynamic Time Warping for Speech Recognition with Training Part to Reduce the Computation”,Xihao Sun, Yoshikazu Miyanaga, Baiko Sai,Journal of Signal Processing (JSP), Vol.18, No.2, pp.89-96,2014.
・”Industrial Wireless LAN System Compatible with Asynchronous Communication”,Makoto Tsurita, Kyoshiro Sakamoto, Mizuki Toyofuku, Yoshiki Itou, Tran Thi Thao Nguyen, Tatsumi Uwai, Yuhei Nagao, Masayuki Kurosaki, Baiko Sai,IEEE communications 2018. 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS),2018.
International conference：
・”Performance Evaluation of Low Density Parity Check Codes for IEEE 802.11n and Its ASIC Design”,Wahyul Amien SYAFEI, Yuhei NAGAO, Ryuichi YOHENA, Hiroyuki SHIMAJIRI, Takeo YOSHIDA, Masayuki KUROSAKI, Baiko SAI, and Hiroshi OCHI,International Symposium on Communications and Information Technologies (ISCIT 2008), No. D3-AM, Don Chan Palace, Vientiane, Lao PDR, October 21-23, 2008.
・”FPGA Implementation of High Throughput 600Mbps WLAN System using 4×2 MIMO OFDM”,Wahyul Amien SYAFEI, Yuhei NAGAO, Ryuta IMASHIOYA, Masayuki KUROSAKI, Baiko SAI, and Hiroshi OCHI,42nd Asilomar Conference on Signals, Systems and Computers, No. TA5b-5, Asilomar Conference Ground, Monterey, California, USA, October 26-29, 2008.
・”Pilot Aided Channel Estimation for a 2×2 MIMO DVB-T2 System in High Speed Mobile Environment”,Nico Surantha, Uwai, Tatsumi ; Nagao, Yuhei ; Kurosaki, Masayuki ; Sai, Baiko; Ochi, Hiroshi,Proceeding of IEEE Vehicular Technology Conference (VTC Fall), 2012 IEEE, September 3, 2012.
・”A 3us Wake-up Time Nonvolatile Processor Based on Ferroelectric Flip-Flops”,Mei-Fang Chiang, Yanxin Yan Yiqun Wang, Yongpan Liu, Shuangchen Li, Daming Zhang, Bo Zhao, Baiko Sai, Huazhong Yang,Proceedings of the ESSCIRC (ESSCIRC),2012.
・”An Evaluation of Channel Estimation Using RLS Algorithm in MIMO-OFDM Systems”,Hiroki Iwaizumi, Masahiro Sugitani, Baiko Sai, Hiroshi Tsutsui, Yoshikazu Miyanaga,roceedings of International Symposium on Communications, Control, and Signal Processing (ISCCSP), pp. 627-630, 21-23 May. 2014.
・”Live demonstration: IEEE802.11 wireless LAN system verification platform”,Tatsumi Uwai, Leonardo Lanante, Baiko Sai, Hiroshi Ochi, Yuhei Nagao, Nico Surantha,IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS 2015-February (February) pp175-176,2015.
Conference presentation (partial):
・”Construction of ZCZ Huffman Sequences for Underground Multiplexing Sonar”,Yoshihiro Tanada, Kiminori Sato, Masato Iguchi and Baiko Sai,International Workshop on Signal Design and Its Applications in Communications, IWSDA 2017, Sapporo, Japan, September 24-28, 2017.
・”Channel Selectivity Schemes for Re-transmission Diversity in Industrial Wireless System”,Maria K., N. Sutisna, Y. Nagao, L. Lanante, Jr., M. Kurosaki, B. Sai, and H. Ochi,International Symposium on Electronics and Smart Devices (ISESD), Yogyakarta, Indonesia, Oct.17-19, 2017.
・”High-Accuracy Time Synchronization for Factory Automation WLAN Communication Systems”,Masaya Suzuki, Tran Thi Thao Nguyen, Yuhei Nagao, Masayuki Kurosaki, Baiko Sai,International Symposium on Multimedia and Communication Technology (ISMAC 2018), Tottori, Aug. 29-31(31), 2018.
・”FPGA Implementation of Wireless LAN System for Factory Automation”,Tran Thi Thao Nguyen, Yuhei Nagao, Tatsumi Uwai, Nana Sutisna, Masayuki Kurosaki, Hiroshi Ochi, and Baiko Sai,International Conference on Advanced Technologies for Communications (ATC), pp.78-83, Ho Chi Minh City, Vietnam, October 18-20, 2018.
・”Industrial Wireless LAN System Compatible with Asynchronous Communication”,Makoto Tsurita, Kyoshiro Sakamoto, Mizuki Toyofuku, Yoshiki Itou, Tran Thi Thao Nguyen, Tatsumi Uwai, Yuhei Nagao, Masayuki Kurosaki, Baiko Sai, Hiroshi Ochi,International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)2018.
・”FPGA implementation verification in industrial wireless LAN system”,Makoto Tsurita, Kyoshiro Sakamoto,Tran Thi Thao Nguyen, Tatsumi Uwai, Yuhei Nagao, Masayuki Kurosaki, Baiko Sai, Hiroshi Ochi,IEICE General Conference, Tokyo Denki University, A-17-1,2022.
Patent:
・[Receiving device, receiving method, and electronic equipment using the receiving device],Japan Application number: 2005-296406 Registered on October 11, 2005.
・[Error checking device and playback device using the same],Japan Application number 2005-296936 Registered October 11, 2005.
・[Audio data processing circuit and electronic equipment equipped with it],Japan Application number: 2005-319817 Registered on November 2, 2005.
・[OFDM noise removal system, program and method],Japanese Patent No. 4059402 Registered on December 28, 2007.
・[Digital image signal conversion method and device],Japan Application number: 2009-143099 Registered on June 16, 2009.
・[Frequency divider circuit, clock generation circuit, andJapanese Patent No. 4499009 Registered on April 23, 2010electronic equipment equipped with the same],Japan Patent No. 4499009 Registered on April 23, 2010.
・[Clock generation circuit and electronic equipment equipped with it],Japan Patent No. 4519746 Registered on May 28, 2010.
・[Device key protection method: encryption device and decoding device, as well as image sending device and image receiving device],Patent Certificate of the Republic of China Invention No. 1336584.
・[Data playback circuit and electronic equipment equipped with it],Japan Patent No. 4920225 Registered on February 10, 2012.
・[Clock generation circuit and electronic equipment equipped with it],Japan Patent No. 4950464 Registered in March 2012.
担当授業科目 Courses Taught
- Introduction to Information Literacy 情報リテラシー概論
- Introduction to Artificial Intelligence 人工知能概論
- Introduction to Data Science データサイエンス概論
- Introduction to Software Engineering ソフトウェア工学概論
所属学会 Associations
Institute of Information, Electronics and Communication Engineers (IIECE)
